653 lines
24 KiB
C
653 lines
24 KiB
C
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/**
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******************************************************************************
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* @file stm32g4xx_hal_pwr.c
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* @author MCD Application Team
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* @brief PWR HAL module driver.
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* This file provides firmware functions to manage the following
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* functionalities of the Power Controller (PWR) peripheral:
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* + Initialization/de-initialization functions
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* + Peripheral Control functions
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*
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******************************************************************************
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* @attention
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*
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* Copyright (c) 2019 STMicroelectronics.
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* All rights reserved.
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*
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* This software is licensed under terms that can be found in the LICENSE file
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* in the root directory of this software component.
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* If no LICENSE file comes with this software, it is provided AS-IS.
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*
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******************************************************************************
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*/
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/* Includes ------------------------------------------------------------------*/
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#include "stm32g4xx_hal.h"
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/** @addtogroup STM32G4xx_HAL_Driver
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* @{
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*/
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/** @defgroup PWR PWR
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* @brief PWR HAL module driver
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* @{
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*/
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#ifdef HAL_PWR_MODULE_ENABLED
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/* Private typedef -----------------------------------------------------------*/
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/* Private define ------------------------------------------------------------*/
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/** @defgroup PWR_Private_Defines PWR Private Defines
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* @{
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*/
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/** @defgroup PWR_PVD_Mode_Mask PWR PVD Mode Mask
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* @{
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*/
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#define PVD_MODE_IT ((uint32_t)0x00010000) /*!< Mask for interruption yielded by PVD threshold crossing */
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#define PVD_MODE_EVT ((uint32_t)0x00020000) /*!< Mask for event yielded by PVD threshold crossing */
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#define PVD_RISING_EDGE ((uint32_t)0x00000001) /*!< Mask for rising edge set as PVD trigger */
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#define PVD_FALLING_EDGE ((uint32_t)0x00000002) /*!< Mask for falling edge set as PVD trigger */
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/**
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* @}
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*/
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/**
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* @}
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*/
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/* Private macro -------------------------------------------------------------*/
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/* Private variables ---------------------------------------------------------*/
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/* Private function prototypes -----------------------------------------------*/
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/* Exported functions --------------------------------------------------------*/
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/** @defgroup PWR_Exported_Functions PWR Exported Functions
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* @{
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*/
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/** @defgroup PWR_Exported_Functions_Group1 Initialization and de-initialization functions
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* @brief Initialization and de-initialization functions
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*
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@verbatim
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===============================================================================
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##### Initialization and de-initialization functions #####
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===============================================================================
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[..]
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@endverbatim
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* @{
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*/
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/**
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* @brief Deinitialize the HAL PWR peripheral registers to their default reset values.
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* @retval None
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*/
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void HAL_PWR_DeInit(void)
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{
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__HAL_RCC_PWR_FORCE_RESET();
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__HAL_RCC_PWR_RELEASE_RESET();
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}
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/**
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* @brief Enable access to the backup domain
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* (RTC registers, RTC backup data registers).
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* @note After reset, the backup domain is protected against
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* possible unwanted write accesses.
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* @note RTCSEL that sets the RTC clock source selection is in the RTC back-up domain.
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* In order to set or modify the RTC clock, the backup domain access must be
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* disabled.
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* @note LSEON bit that switches on and off the LSE crystal belongs as well to the
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* back-up domain.
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* @retval None
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*/
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void HAL_PWR_EnableBkUpAccess(void)
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{
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SET_BIT(PWR->CR1, PWR_CR1_DBP);
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}
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/**
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* @brief Disable access to the backup domain
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* (RTC registers, RTC backup data registers).
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* @retval None
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*/
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void HAL_PWR_DisableBkUpAccess(void)
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{
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CLEAR_BIT(PWR->CR1, PWR_CR1_DBP);
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}
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/**
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* @}
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*/
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/** @defgroup PWR_Exported_Functions_Group2 Peripheral Control functions
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* @brief Low Power modes configuration functions
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*
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@verbatim
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===============================================================================
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##### Peripheral Control functions #####
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===============================================================================
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[..]
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*** PVD configuration ***
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=========================
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[..]
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(+) The PVD is used to monitor the VDD power supply by comparing it to a
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threshold selected by the PVD Level (PLS[2:0] bits in PWR_CR2 register).
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(+) PVDO flag is available to indicate if VDD/VDDA is higher or lower
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than the PVD threshold. This event is internally connected to the EXTI
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line16 and can generate an interrupt if enabled. This is done through
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__HAL_PVD_EXTI_ENABLE_IT() macro.
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(+) The PVD is stopped in Standby mode.
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*** WakeUp pin configuration ***
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================================
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[..]
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(+) WakeUp pins are used to wakeup the system from Standby mode or Shutdown mode.
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The polarity of these pins can be set to configure event detection on high
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level (rising edge) or low level (falling edge).
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*** Low Power modes configuration ***
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=====================================
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[..]
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The devices feature 8 low-power modes:
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(+) Low-power Run mode: core and peripherals are running, main regulator off, low power regulator on.
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(+) Sleep mode: Cortex-M4 core stopped, peripherals kept running, main and low power regulators on.
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(+) Low-power Sleep mode: Cortex-M4 core stopped, peripherals kept running, main regulator off, low power regulator on.
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(+) Stop 0 mode: all clocks are stopped except LSI and LSE, main and low power regulators on.
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(+) Stop 1 mode: all clocks are stopped except LSI and LSE, main regulator off, low power regulator on.
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(+) Standby mode with SRAM2: all clocks are stopped except LSI and LSE, SRAM2 content preserved, main regulator off, low power regulator on.
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(+) Standby mode without SRAM2: all clocks are stopped except LSI and LSE, main and low power regulators off.
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(+) Shutdown mode: all clocks are stopped except LSE, main and low power regulators off.
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*** Low-power run mode ***
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==========================
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[..]
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(+) Entry: (from main run mode)
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(++) set LPR bit with HAL_PWREx_EnableLowPowerRunMode() API after having decreased the system clock below 2 MHz.
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(+) Exit:
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(++) clear LPR bit then wait for REGLP bit to be reset with HAL_PWREx_DisableLowPowerRunMode() API. Only
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then can the system clock frequency be increased above 2 MHz.
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*** Sleep mode / Low-power sleep mode ***
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=========================================
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[..]
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(+) Entry:
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The Sleep mode / Low-power Sleep mode is entered through HAL_PWR_EnterSLEEPMode() API
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in specifying whether or not the regulator is forced to low-power mode and if exit is interrupt or event-triggered.
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(++) PWR_MAINREGULATOR_ON: Sleep mode (regulator in main mode).
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(++) PWR_LOWPOWERREGULATOR_ON: Low-power sleep (regulator in low power mode).
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In the latter case, the system clock frequency must have been decreased below 2 MHz beforehand.
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(++) PWR_SLEEPENTRY_WFI: enter SLEEP mode with WFI instruction
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(++) PWR_SLEEPENTRY_WFE: enter SLEEP mode with WFE instruction
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(+) WFI Exit:
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(++) Any peripheral interrupt acknowledged by the nested vectored interrupt
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controller (NVIC) or any wake-up event.
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(+) WFE Exit:
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(++) Any wake-up event such as an EXTI line configured in event mode.
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[..] When exiting the Low-power sleep mode by issuing an interrupt or a wakeup event,
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the MCU is in Low-power Run mode.
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*** Stop 0, Stop 1 modes ***
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===============================
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[..]
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(+) Entry:
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The Stop 0, Stop 1 modes are entered through the following API's:
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(++) HAL_PWREx_EnterSTOP0Mode() for mode 0 or HAL_PWREx_EnterSTOP1Mode() for mode 1 or for porting reasons HAL_PWR_EnterSTOPMode().
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(+) Regulator setting (applicable to HAL_PWR_EnterSTOPMode() only):
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(++) PWR_MAINREGULATOR_ON
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(++) PWR_LOWPOWERREGULATOR_ON
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(+) Exit (interrupt or event-triggered, specified when entering STOP mode):
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(++) PWR_STOPENTRY_WFI: enter Stop mode with WFI instruction
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(++) PWR_STOPENTRY_WFE: enter Stop mode with WFE instruction
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(+) WFI Exit:
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(++) Any EXTI Line (Internal or External) configured in Interrupt mode.
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(++) Some specific communication peripherals (USART, LPUART, I2C) interrupts
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when programmed in wakeup mode.
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(+) WFE Exit:
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(++) Any EXTI Line (Internal or External) configured in Event mode.
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[..]
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When exiting Stop 0 and Stop 1 modes, the MCU is either in Run mode or in Low-power Run mode
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depending on the LPR bit setting.
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*** Standby mode ***
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====================
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[..]
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The Standby mode offers two options:
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(+) option a) all clocks off except LSI and LSE, RRS bit set (keeps voltage regulator in low power mode).
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SRAM and registers contents are lost except for the SRAM2 content, the RTC registers, RTC backup registers
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and Standby circuitry.
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(+) option b) all clocks off except LSI and LSE, RRS bit cleared (voltage regulator then disabled).
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SRAM and register contents are lost except for the RTC registers, RTC backup registers
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and Standby circuitry.
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(++) Entry:
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(+++) The Standby mode is entered through HAL_PWR_EnterSTANDBYMode() API.
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SRAM1 and register contents are lost except for registers in the Backup domain and
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Standby circuitry. SRAM2 content can be preserved if the bit RRS is set in PWR_CR3 register.
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To enable this feature, the user can resort to HAL_PWREx_EnableSRAM2ContentRetention() API
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to set RRS bit.
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(++) Exit:
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(+++) WKUP pin rising edge, RTC alarm or wakeup, tamper event, time-stamp event,
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external reset in NRST pin, IWDG reset.
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[..] After waking up from Standby mode, program execution restarts in the same way as after a Reset.
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*** Shutdown mode ***
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======================
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[..]
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In Shutdown mode,
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voltage regulator is disabled, all clocks are off except LSE, RRS bit is cleared.
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SRAM and registers contents are lost except for backup domain registers.
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(+) Entry:
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The Shutdown mode is entered through HAL_PWREx_EnterSHUTDOWNMode() API.
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(+) Exit:
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(++) WKUP pin rising edge, RTC alarm or wakeup, tamper event, time-stamp event,
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external reset in NRST pin.
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[..] After waking up from Shutdown mode, program execution restarts in the same way as after a Reset.
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*** Auto-wakeup (AWU) from low-power mode ***
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=============================================
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[..]
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The MCU can be woken up from low-power mode by an RTC Alarm event, an RTC
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Wakeup event, a tamper event or a time-stamp event, without depending on
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an external interrupt (Auto-wakeup mode).
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(+) RTC auto-wakeup (AWU) from the Stop, Standby and Shutdown modes
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(++) To wake up from the Stop mode with an RTC alarm event, it is necessary to
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configure the RTC to generate the RTC alarm using the HAL_RTC_SetAlarm_IT() function.
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(++) To wake up from the Stop mode with an RTC Tamper or time stamp event, it
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is necessary to configure the RTC to detect the tamper or time stamp event using the
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HAL_RTCEx_SetTimeStamp_IT() or HAL_RTCEx_SetTamper_IT() functions.
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(++) To wake up from the Stop mode with an RTC WakeUp event, it is necessary to
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configure the RTC to generate the RTC WakeUp event using the HAL_RTCEx_SetWakeUpTimer_IT() function.
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@endverbatim
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* @{
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*/
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/**
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* @brief Configure the voltage threshold detected by the Power Voltage Detector (PVD).
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* @param sConfigPVD: pointer to a PWR_PVDTypeDef structure that contains the PVD
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* configuration information.
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* @note Refer to the electrical characteristics of your device datasheet for
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* more details about the voltage thresholds corresponding to each
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* detection level.
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* @retval None
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*/
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HAL_StatusTypeDef HAL_PWR_ConfigPVD(PWR_PVDTypeDef *sConfigPVD)
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{
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/* Check the parameters */
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assert_param(IS_PWR_PVD_LEVEL(sConfigPVD->PVDLevel));
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assert_param(IS_PWR_PVD_MODE(sConfigPVD->Mode));
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/* Set PLS bits according to PVDLevel value */
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MODIFY_REG(PWR->CR2, PWR_CR2_PLS, sConfigPVD->PVDLevel);
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/* Clear any previous config. Keep it clear if no event or IT mode is selected */
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__HAL_PWR_PVD_EXTI_DISABLE_EVENT();
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__HAL_PWR_PVD_EXTI_DISABLE_IT();
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__HAL_PWR_PVD_EXTI_DISABLE_FALLING_EDGE();
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__HAL_PWR_PVD_EXTI_DISABLE_RISING_EDGE();
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/* Configure interrupt mode */
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if((sConfigPVD->Mode & PVD_MODE_IT) == PVD_MODE_IT)
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{
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__HAL_PWR_PVD_EXTI_ENABLE_IT();
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}
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/* Configure event mode */
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if((sConfigPVD->Mode & PVD_MODE_EVT) == PVD_MODE_EVT)
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{
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__HAL_PWR_PVD_EXTI_ENABLE_EVENT();
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}
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/* Configure the edge */
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if((sConfigPVD->Mode & PVD_RISING_EDGE) == PVD_RISING_EDGE)
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{
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__HAL_PWR_PVD_EXTI_ENABLE_RISING_EDGE();
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}
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if((sConfigPVD->Mode & PVD_FALLING_EDGE) == PVD_FALLING_EDGE)
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{
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__HAL_PWR_PVD_EXTI_ENABLE_FALLING_EDGE();
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}
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return HAL_OK;
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}
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/**
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* @brief Enable the Power Voltage Detector (PVD).
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* @retval None
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*/
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void HAL_PWR_EnablePVD(void)
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{
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SET_BIT(PWR->CR2, PWR_CR2_PVDE);
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}
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/**
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* @brief Disable the Power Voltage Detector (PVD).
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* @retval None
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*/
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void HAL_PWR_DisablePVD(void)
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{
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CLEAR_BIT(PWR->CR2, PWR_CR2_PVDE);
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}
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|
|
|
||
|
|
|
||
|
|
/**
|
||
|
|
* @brief Enable the WakeUp PINx functionality.
|
||
|
|
* @param WakeUpPinPolarity: Specifies which Wake-Up pin to enable.
|
||
|
|
* This parameter can be one of the following legacy values which set the default polarity
|
||
|
|
* i.e. detection on high level (rising edge):
|
||
|
|
* @arg @ref PWR_WAKEUP_PIN1, PWR_WAKEUP_PIN2, PWR_WAKEUP_PIN3, PWR_WAKEUP_PIN4, PWR_WAKEUP_PIN5
|
||
|
|
*
|
||
|
|
* or one of the following value where the user can explicitly specify the enabled pin and
|
||
|
|
* the chosen polarity:
|
||
|
|
* @arg @ref PWR_WAKEUP_PIN1_HIGH or PWR_WAKEUP_PIN1_LOW
|
||
|
|
* @arg @ref PWR_WAKEUP_PIN2_HIGH or PWR_WAKEUP_PIN2_LOW
|
||
|
|
* @arg @ref PWR_WAKEUP_PIN3_HIGH or PWR_WAKEUP_PIN3_LOW
|
||
|
|
* @arg @ref PWR_WAKEUP_PIN4_HIGH or PWR_WAKEUP_PIN4_LOW
|
||
|
|
* @arg @ref PWR_WAKEUP_PIN5_HIGH or PWR_WAKEUP_PIN5_LOW
|
||
|
|
* @note PWR_WAKEUP_PINx and PWR_WAKEUP_PINx_HIGH are equivalent.
|
||
|
|
* @retval None
|
||
|
|
*/
|
||
|
|
void HAL_PWR_EnableWakeUpPin(uint32_t WakeUpPinPolarity)
|
||
|
|
{
|
||
|
|
assert_param(IS_PWR_WAKEUP_PIN(WakeUpPinPolarity));
|
||
|
|
|
||
|
|
/* Specifies the Wake-Up pin polarity for the event detection
|
||
|
|
(rising or falling edge) */
|
||
|
|
MODIFY_REG(PWR->CR4, (PWR_CR3_EWUP & WakeUpPinPolarity), (WakeUpPinPolarity >> PWR_WUP_POLARITY_SHIFT));
|
||
|
|
|
||
|
|
/* Enable wake-up pin */
|
||
|
|
SET_BIT(PWR->CR3, (PWR_CR3_EWUP & WakeUpPinPolarity));
|
||
|
|
|
||
|
|
|
||
|
|
}
|
||
|
|
|
||
|
|
/**
|
||
|
|
* @brief Disable the WakeUp PINx functionality.
|
||
|
|
* @param WakeUpPinx: Specifies the Power Wake-Up pin to disable.
|
||
|
|
* This parameter can be one of the following values:
|
||
|
|
* @arg @ref PWR_WAKEUP_PIN1, PWR_WAKEUP_PIN2, PWR_WAKEUP_PIN3, PWR_WAKEUP_PIN4, PWR_WAKEUP_PIN5
|
||
|
|
* @retval None
|
||
|
|
*/
|
||
|
|
void HAL_PWR_DisableWakeUpPin(uint32_t WakeUpPinx)
|
||
|
|
{
|
||
|
|
assert_param(IS_PWR_WAKEUP_PIN(WakeUpPinx));
|
||
|
|
|
||
|
|
CLEAR_BIT(PWR->CR3, (PWR_CR3_EWUP & WakeUpPinx));
|
||
|
|
}
|
||
|
|
|
||
|
|
|
||
|
|
/**
|
||
|
|
* @brief Enter Sleep or Low-power Sleep mode.
|
||
|
|
* @note In Sleep/Low-power Sleep mode, all I/O pins keep the same state as in Run mode.
|
||
|
|
* @param Regulator: Specifies the regulator state in Sleep/Low-power Sleep mode.
|
||
|
|
* This parameter can be one of the following values:
|
||
|
|
* @arg @ref PWR_MAINREGULATOR_ON Sleep mode (regulator in main mode)
|
||
|
|
* @arg @ref PWR_LOWPOWERREGULATOR_ON Low-power Sleep mode (regulator in low-power mode)
|
||
|
|
* @note Low-power Sleep mode is entered from Low-power Run mode. Therefore, if not yet
|
||
|
|
* in Low-power Run mode before calling HAL_PWR_EnterSLEEPMode() with Regulator set
|
||
|
|
* to PWR_LOWPOWERREGULATOR_ON, the user can optionally configure the
|
||
|
|
* Flash in power-down monde in setting the SLEEP_PD bit in FLASH_ACR register.
|
||
|
|
* Additionally, the clock frequency must be reduced below 2 MHz.
|
||
|
|
* Setting SLEEP_PD in FLASH_ACR then appropriately reducing the clock frequency must
|
||
|
|
* be done before calling HAL_PWR_EnterSLEEPMode() API.
|
||
|
|
* @note When exiting Low-power Sleep mode, the MCU is in Low-power Run mode. To move in
|
||
|
|
* Run mode, the user must resort to HAL_PWREx_DisableLowPowerRunMode() API.
|
||
|
|
* @param SLEEPEntry: Specifies if Sleep mode is entered with WFI or WFE instruction.
|
||
|
|
* This parameter can be one of the following values:
|
||
|
|
* @arg @ref PWR_SLEEPENTRY_WFI enter Sleep or Low-power Sleep mode with WFI instruction
|
||
|
|
* @arg @ref PWR_SLEEPENTRY_WFE enter Sleep or Low-power Sleep mode with WFE instruction
|
||
|
|
* @note When WFI entry is used, tick interrupt have to be disabled if not desired as
|
||
|
|
* the interrupt wake up source.
|
||
|
|
* @retval None
|
||
|
|
*/
|
||
|
|
void HAL_PWR_EnterSLEEPMode(uint32_t Regulator, uint8_t SLEEPEntry)
|
||
|
|
{
|
||
|
|
/* Check the parameters */
|
||
|
|
assert_param(IS_PWR_REGULATOR(Regulator));
|
||
|
|
assert_param(IS_PWR_SLEEP_ENTRY(SLEEPEntry));
|
||
|
|
|
||
|
|
/* Set Regulator parameter */
|
||
|
|
if (Regulator == PWR_MAINREGULATOR_ON)
|
||
|
|
{
|
||
|
|
/* If in low-power run mode at this point, exit it */
|
||
|
|
if (HAL_IS_BIT_SET(PWR->SR2, PWR_SR2_REGLPF))
|
||
|
|
{
|
||
|
|
(void)HAL_PWREx_DisableLowPowerRunMode();
|
||
|
|
}
|
||
|
|
/* Regulator now in main mode. */
|
||
|
|
}
|
||
|
|
else
|
||
|
|
{
|
||
|
|
/* If in run mode, first move to low-power run mode.
|
||
|
|
The system clock frequency must be below 2 MHz at this point. */
|
||
|
|
if (HAL_IS_BIT_SET(PWR->SR2, PWR_SR2_REGLPF) == 0U)
|
||
|
|
{
|
||
|
|
HAL_PWREx_EnableLowPowerRunMode();
|
||
|
|
}
|
||
|
|
}
|
||
|
|
|
||
|
|
/* Clear SLEEPDEEP bit of Cortex System Control Register */
|
||
|
|
CLEAR_BIT(SCB->SCR, ((uint32_t)SCB_SCR_SLEEPDEEP_Msk));
|
||
|
|
|
||
|
|
/* Select SLEEP mode entry -------------------------------------------------*/
|
||
|
|
if(SLEEPEntry == PWR_SLEEPENTRY_WFI)
|
||
|
|
{
|
||
|
|
/* Request Wait For Interrupt */
|
||
|
|
__WFI();
|
||
|
|
}
|
||
|
|
else
|
||
|
|
{
|
||
|
|
/* Request Wait For Event */
|
||
|
|
__SEV();
|
||
|
|
__WFE();
|
||
|
|
__WFE();
|
||
|
|
}
|
||
|
|
|
||
|
|
}
|
||
|
|
|
||
|
|
|
||
|
|
/**
|
||
|
|
* @brief Enter Stop mode
|
||
|
|
* @note This API is named HAL_PWR_EnterSTOPMode to ensure compatibility with legacy code running
|
||
|
|
* on devices where only "Stop mode" is mentioned with main or low power regulator ON.
|
||
|
|
* @note In Stop mode, all I/O pins keep the same state as in Run mode.
|
||
|
|
* @note All clocks in the VCORE domain are stopped; the PLL,
|
||
|
|
* the HSI and the HSE oscillators are disabled. Some peripherals with the wakeup capability
|
||
|
|
* (I2Cx, USARTx and LPUART) can switch on the HSI to receive a frame, and switch off the HSI
|
||
|
|
* after receiving the frame if it is not a wakeup frame. In this case, the HSI clock is propagated
|
||
|
|
* only to the peripheral requesting it.
|
||
|
|
* SRAM1, SRAM2 and register contents are preserved.
|
||
|
|
* The BOR is available.
|
||
|
|
* The voltage regulator can be configured either in normal (Stop 0) or low-power mode (Stop 1).
|
||
|
|
* @note When exiting Stop 0 or Stop 1 mode by issuing an interrupt or a wakeup event,
|
||
|
|
* the HSI RC oscillator is selected as system clock.
|
||
|
|
* @note When the voltage regulator operates in low power mode (Stop 1), an additional
|
||
|
|
* startup delay is incurred when waking up.
|
||
|
|
* By keeping the internal regulator ON during Stop mode (Stop 0), the consumption
|
||
|
|
* is higher although the startup time is reduced.
|
||
|
|
* @param Regulator: Specifies the regulator state in Stop mode.
|
||
|
|
* This parameter can be one of the following values:
|
||
|
|
* @arg @ref PWR_MAINREGULATOR_ON Stop 0 mode (main regulator ON)
|
||
|
|
* @arg @ref PWR_LOWPOWERREGULATOR_ON Stop 1 mode (low power regulator ON)
|
||
|
|
* @param STOPEntry: Specifies Stop 0 or Stop 1 mode is entered with WFI or WFE instruction.
|
||
|
|
* This parameter can be one of the following values:
|
||
|
|
* @arg @ref PWR_STOPENTRY_WFI Enter Stop 0 or Stop 1 mode with WFI instruction.
|
||
|
|
* @arg @ref PWR_STOPENTRY_WFE Enter Stop 0 or Stop 1 mode with WFE instruction.
|
||
|
|
* @retval None
|
||
|
|
*/
|
||
|
|
void HAL_PWR_EnterSTOPMode(uint32_t Regulator, uint8_t STOPEntry)
|
||
|
|
{
|
||
|
|
/* Check the parameters */
|
||
|
|
assert_param(IS_PWR_REGULATOR(Regulator));
|
||
|
|
|
||
|
|
if(Regulator == PWR_LOWPOWERREGULATOR_ON)
|
||
|
|
{
|
||
|
|
HAL_PWREx_EnterSTOP1Mode(STOPEntry);
|
||
|
|
}
|
||
|
|
else
|
||
|
|
{
|
||
|
|
HAL_PWREx_EnterSTOP0Mode(STOPEntry);
|
||
|
|
}
|
||
|
|
}
|
||
|
|
|
||
|
|
/**
|
||
|
|
* @brief Enter Standby mode.
|
||
|
|
* @note In Standby mode, the PLL, the HSI and the HSE oscillators are switched
|
||
|
|
* off. The voltage regulator is disabled, except when SRAM2 content is preserved
|
||
|
|
* in which case the regulator is in low-power mode.
|
||
|
|
* SRAM1 and register contents are lost except for registers in the Backup domain and
|
||
|
|
* Standby circuitry. SRAM2 content can be preserved if the bit RRS is set in PWR_CR3 register.
|
||
|
|
* To enable this feature, the user can resort to HAL_PWREx_EnableSRAM2ContentRetention() API
|
||
|
|
* to set RRS bit.
|
||
|
|
* The BOR is available.
|
||
|
|
* @note The I/Os can be configured either with a pull-up or pull-down or can be kept in analog state.
|
||
|
|
* HAL_PWREx_EnableGPIOPullUp() and HAL_PWREx_EnableGPIOPullDown() respectively enable Pull Up and
|
||
|
|
* Pull Down state, HAL_PWREx_DisableGPIOPullUp() and HAL_PWREx_DisableGPIOPullDown() disable the
|
||
|
|
* same.
|
||
|
|
* These states are effective in Standby mode only if APC bit is set through
|
||
|
|
* HAL_PWREx_EnablePullUpPullDownConfig() API.
|
||
|
|
* @retval None
|
||
|
|
*/
|
||
|
|
void HAL_PWR_EnterSTANDBYMode(void)
|
||
|
|
{
|
||
|
|
/* Set Stand-by mode */
|
||
|
|
MODIFY_REG(PWR->CR1, PWR_CR1_LPMS, PWR_CR1_LPMS_STANDBY);
|
||
|
|
|
||
|
|
/* Set SLEEPDEEP bit of Cortex System Control Register */
|
||
|
|
SET_BIT(SCB->SCR, ((uint32_t)SCB_SCR_SLEEPDEEP_Msk));
|
||
|
|
|
||
|
|
/* This option is used to ensure that store operations are completed */
|
||
|
|
#if defined ( __CC_ARM)
|
||
|
|
__force_stores();
|
||
|
|
#endif
|
||
|
|
/* Request Wait For Interrupt */
|
||
|
|
__WFI();
|
||
|
|
}
|
||
|
|
|
||
|
|
|
||
|
|
|
||
|
|
/**
|
||
|
|
* @brief Indicate Sleep-On-Exit when returning from Handler mode to Thread mode.
|
||
|
|
* @note Set SLEEPONEXIT bit of SCR register. When this bit is set, the processor
|
||
|
|
* re-enters SLEEP mode when an interruption handling is over.
|
||
|
|
* Setting this bit is useful when the processor is expected to run only on
|
||
|
|
* interruptions handling.
|
||
|
|
* @retval None
|
||
|
|
*/
|
||
|
|
void HAL_PWR_EnableSleepOnExit(void)
|
||
|
|
{
|
||
|
|
/* Set SLEEPONEXIT bit of Cortex System Control Register */
|
||
|
|
SET_BIT(SCB->SCR, ((uint32_t)SCB_SCR_SLEEPONEXIT_Msk));
|
||
|
|
}
|
||
|
|
|
||
|
|
|
||
|
|
/**
|
||
|
|
* @brief Disable Sleep-On-Exit feature when returning from Handler mode to Thread mode.
|
||
|
|
* @note Clear SLEEPONEXIT bit of SCR register. When this bit is set, the processor
|
||
|
|
* re-enters SLEEP mode when an interruption handling is over.
|
||
|
|
* @retval None
|
||
|
|
*/
|
||
|
|
void HAL_PWR_DisableSleepOnExit(void)
|
||
|
|
{
|
||
|
|
/* Clear SLEEPONEXIT bit of Cortex System Control Register */
|
||
|
|
CLEAR_BIT(SCB->SCR, ((uint32_t)SCB_SCR_SLEEPONEXIT_Msk));
|
||
|
|
}
|
||
|
|
|
||
|
|
|
||
|
|
|
||
|
|
/**
|
||
|
|
* @brief Enable CORTEX M4 SEVONPEND bit.
|
||
|
|
* @note Set SEVONPEND bit of SCR register. When this bit is set, this causes
|
||
|
|
* WFE to wake up when an interrupt moves from inactive to pended.
|
||
|
|
* @retval None
|
||
|
|
*/
|
||
|
|
void HAL_PWR_EnableSEVOnPend(void)
|
||
|
|
{
|
||
|
|
/* Set SEVONPEND bit of Cortex System Control Register */
|
||
|
|
SET_BIT(SCB->SCR, ((uint32_t)SCB_SCR_SEVONPEND_Msk));
|
||
|
|
}
|
||
|
|
|
||
|
|
|
||
|
|
/**
|
||
|
|
* @brief Disable CORTEX M4 SEVONPEND bit.
|
||
|
|
* @note Clear SEVONPEND bit of SCR register. When this bit is set, this causes
|
||
|
|
* WFE to wake up when an interrupt moves from inactive to pended.
|
||
|
|
* @retval None
|
||
|
|
*/
|
||
|
|
void HAL_PWR_DisableSEVOnPend(void)
|
||
|
|
{
|
||
|
|
/* Clear SEVONPEND bit of Cortex System Control Register */
|
||
|
|
CLEAR_BIT(SCB->SCR, ((uint32_t)SCB_SCR_SEVONPEND_Msk));
|
||
|
|
}
|
||
|
|
|
||
|
|
|
||
|
|
|
||
|
|
|
||
|
|
|
||
|
|
/**
|
||
|
|
* @brief PWR PVD interrupt callback
|
||
|
|
* @retval None
|
||
|
|
*/
|
||
|
|
__weak void HAL_PWR_PVDCallback(void)
|
||
|
|
{
|
||
|
|
/* NOTE : This function should not be modified; when the callback is needed,
|
||
|
|
the HAL_PWR_PVDCallback can be implemented in the user file
|
||
|
|
*/
|
||
|
|
}
|
||
|
|
|
||
|
|
/**
|
||
|
|
* @}
|
||
|
|
*/
|
||
|
|
|
||
|
|
/**
|
||
|
|
* @}
|
||
|
|
*/
|
||
|
|
|
||
|
|
#endif /* HAL_PWR_MODULE_ENABLED */
|
||
|
|
/**
|
||
|
|
* @}
|
||
|
|
*/
|
||
|
|
|
||
|
|
/**
|
||
|
|
* @}
|
||
|
|
*/
|
||
|
|
|