Loggy_McLogger/Core/Src/IS66.c

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2024-06-24 20:13:52 -05:00
/**
*********************************************************************
*
* @file IS66.h
* @brief IS66 external SPI RAM driver header
*
* @date 2024-04-20 14:18:36
* @author CT
*
* @details
*
*************************************************************************
**/
#include <stdint.h>
#include "spi.h"
#include "IS66.h"
// ================
// DEFINES
// ================
#define READ_CMD 0x03
#define WRITE_CMD 0x02
#define RESET_ENABLE 0x66
#define RESET_CMD 0x99
#define READ_ID_CMD 0x9F
#define DEEP_POWER_DOWN_CMD 0xB9
// ================
// Module Variables
// ================
SPI_HandleTypeDef* m_spi;
// ================
// Public Functions
// ================
/*
*
*/
uint32_t IS66_init(SPI_HandleTypeDef* hspi)
{
uint32_t ret = 0;
m_spi = hspi;
uint8_t buf[8] = {0};
buf[0] = READ_ID_CMD;
// Set CE low
HAL_GPIO_WritePin(RAM_CE_GPIO_Port, RAM_CE_Pin, GPIO_PIN_RESET);
HAL_SPI_Transmit(m_spi, buf, 4, 10);
HAL_SPI_Receive(m_spi, buf, 8, 10);
// Set CE high
HAL_GPIO_WritePin(RAM_CE_GPIO_Port, RAM_CE_Pin, GPIO_PIN_SET);
if (0x5D == buf[0])
{
ret = 1;
}
return(ret);
}
/*
* Reads 4 bytes from addr
*/
uint32_t IS66_Read(uint32_t addr)
{
uint8_t buf[8] = {0};
uint32_t data;
buf[0] = READ_CMD;
buf[1] = (addr & 0x00FF0000) >> 16;
buf[2] = (addr & 0x0000FF00) >> 8;
buf[3] = (addr & 0x000000FF);
// Set CE low
HAL_GPIO_WritePin(RAM_CE_GPIO_Port, RAM_CE_Pin, GPIO_PIN_RESET);
HAL_SPI_Transmit(m_spi, buf, 4, 10);
HAL_SPI_Receive(m_spi, buf, 4, 10);
// Set CE high
HAL_GPIO_WritePin(RAM_CE_GPIO_Port, RAM_CE_Pin, GPIO_PIN_SET);
data = ((uint32_t)buf[3] << 24) + ((uint32_t)buf[2] << 16) + ((uint32_t)buf[1] << 8) + buf[0];
return(data);
}
/*
* Writes 4 bytes to addr
*/
uint32_t IS66_Write(uint32_t addr, uint32_t data)
{
uint8_t buf[8] = {0};
buf[0] = WRITE_CMD;
buf[1] = (addr & 0x00FF0000) >> 16;
buf[2] = (addr & 0x0000FF00) >> 8;
buf[3] = (addr & 0x000000FF);
buf[4] = (data & 0x000000FF);
buf[5] = (data & 0x0000FF00) >> 8;
buf[6] = (data & 0x00FF0000) >> 16;
buf[7] = (data & 0xFF000000) >> 24;
// Set CE low
HAL_GPIO_WritePin(RAM_CE_GPIO_Port, RAM_CE_Pin, GPIO_PIN_RESET);
HAL_SPI_Transmit(m_spi, buf, 8, 10);
// Set CE high
HAL_GPIO_WritePin(RAM_CE_GPIO_Port, RAM_CE_Pin, GPIO_PIN_SET);
return(0);
}
/*
*
*/
void IS66_Deep_Power_Down(void)
{
uint8_t buf[8] = {0};
buf[0] = DEEP_POWER_DOWN_CMD;
// Set CE low
HAL_GPIO_WritePin(RAM_CE_GPIO_Port, RAM_CE_Pin, GPIO_PIN_RESET);
HAL_SPI_Transmit(m_spi, buf, 1, 10);
// Set CE high
HAL_GPIO_WritePin(RAM_CE_GPIO_Port, RAM_CE_Pin, GPIO_PIN_SET);
}
/*
*
*/
void IS66_Exit_Deep_Power_Down(void)
{
// Set CE low
HAL_GPIO_WritePin(RAM_CE_GPIO_Port, RAM_CE_Pin, GPIO_PIN_RESET);
// Wait
HAL_Delay(1);
// Set CE high
HAL_GPIO_WritePin(RAM_CE_GPIO_Port, RAM_CE_Pin, GPIO_PIN_SET);
}
/*
*/
void IS66_Reset(void)
{
uint8_t buf[2] = {RESET_ENABLE, RESET_CMD};
// Set CE low
HAL_GPIO_WritePin(RAM_CE_GPIO_Port, RAM_CE_Pin, GPIO_PIN_RESET);
HAL_SPI_Transmit(m_spi, buf, 2, 10);
// Set CE high
HAL_GPIO_WritePin(RAM_CE_GPIO_Port, RAM_CE_Pin, GPIO_PIN_SET);
}